Semiconductor device having shallow impurity region without short-circuit between gate electrode and source and drain regions and process of fabrication thereof

摘要

Elevated source and drain regions (14a/14b) epitaxially grown on both sides of a gate structure (11i) cause a dopant impurity to form an extremely shallow p-n junctions (15a/15b) in a semiconductor substrate (10a) so as to prevent a field effect transistor from a short channel effect, and side wall spacers (11c/11d) include pad layers (11e/11f) of silicon nitride and spacer layers (11g/11h) of silicon oxide formed on the pad layers so that the elevated source and drain regions (14a/14b) form boundaries to the pad layers (11e/11f) without a facet and a silicon layer on the spacer layers (11g/11h).