| 摘要 |
A contention control circuit has a plurality of buffer units (2-1...2-4) for temporarily storing cells arriving from a respective plurality of input lines (1-1...1-4), and a plurality of contention means which output cells that have been read from these buffer units to a single output line without collisions between the cells. Each buffer unit has a first buffer (40-1...40-4). Each contention control means comprises means for entering, in a cell which has been input to the corresponding first buffer, information indicative of the priority with which that cell is to be output, and a contention control unit (3-1...3-4) provided in correspondence with each first buffer, said contention control units being cascade connected to the input line. Each contention control unit (3-1...3-4) comprises a second buffer (70-1...70-4) for temporarily storing cells which have been output from the immediate upstream contention control unit for eventual output to the output line; means (60-1...60-4) for comparing the information indicative of priority that has been entered respectively in the head cell of the cells stored in the first buffer and in the head cell of the cells stored in the second buffer; and selection means (80-1...80-4) which, in accordance with the comparison result of the comparing means, selects the cell with the higher priority and outputs it to the immediately downstream contention control unit or to the output line. The contention control circuit temporarily stores cells arriving from a respective plurality of input lines to output cells to a single output line without collisions by simply comparing, at each input line in turn, the priority of the cell that has arrived from that input line, with the priority of the cell selected from among cells that have arrived at preceding input lines as the cell having the highest priority, and again selecting the cell with the higher priority. <IMAGE> |
