| 摘要 |
A digital demodulator for frequency modulated, pulse-width modulated and other t emporally modulated signals uses a sign detector (14) to determine zero-crossings of the modulated signal. The peri ods between zero-crossings are determined by at least one gate circuit (16, 18) and at least one counter (22, 24) which counts c lock pulses from a high-speed clock (20) gated by the gate circuit in response to zero-crossings. The period information is converted to a demodulated signal by a numerical processor (12), or a signal processor (12') or a digital-to-analog converter (12'').
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