| 摘要 |
PROBLEM TO BE SOLVED: To provide a pulse generating circuit that generates a pulse train where each pulse has an optional width with a simple configuration. SOLUTION: In the pulse generating circuit that employs a plurality of circuits each in which an intermediate signal Y2 that changes from a leading edge of an input signal Z1 with a prescribed time constant is produced by using a delay circuit consisting of a capacitor C2 and a resistor R2, a NAND gate 5 receiving signals Z1, Y2 provides an output of a pulse Z2 with a prescribed width and an output of the pre-stage is used for an input of a next stage as the series connection circuits, a diode D1 is connected in parallel with the resistor R2 to make an impedance of a charging path of the capacitor C2 negligibly smaller than the impedance of a discharge path. In this case, charges are rapidly charged at the time of charging and charges are discharged according to a regular time constant at the time of discharge. Thus, even when the time constant is set larger to increase the output pulse width, since the rise speed of the charging is fast, the signal Y2 is raised sufficiently faster and the output pulse width is optionally set without being limited by the pulse width of the pulse Z1. |
