发明名称 DIGITAL SYNCHRONIZING DEVICE
摘要 PROBLEM TO BE SOLVED: To generate a qualified writing address when such data that one sector consists of plural frames, and an error correction block is constructed with plural sectors are gained, in the case that the relevant data are stored in an error correction processing memory. SOLUTION: This device is constituted so that when a detection frame number really detected by a synchronous pattern/frame number conversion part 16 does not coincide with a predicted frame number predicted by a frame number counter 15, and when both numbers become a specified relation on the boundary of a certain judgement reference value, when a count value of a sector number counter 20 is revised, and further, correction sensitivity is controlled by integrating a level of an AFC value also into a judgement element, and an offset is imparted to the judgement reference value.
申请公布号 JPH1186460(A) 申请公布日期 1999.03.30
申请号 JP19970242834 申请日期 1997.09.08
申请人 TOSHIBA CORP;TOSHIBA AVE CORP 发明人 MIYANO YUICHI;OZAKI NAOKI
分类号 G11B20/14;H04L7/033 主分类号 G11B20/14
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