发明名称 Memory testing device
摘要 In a memory testing device of a construction wherein various pieces of pattern data output from a pattern generator are taken out in a desired order and converted into a test pattern signal having a real waveform for application to each pin of a memory under test, the pattern selector provided for each I/O pin of the memory under test comprises plural registers having stored therein pattern selection control signals that designate patterns to be selected, a first multiplexer for selecting that one of the registers designated by a register selection control signal PJ generated by the pattern generator, and a second multiplexer that is controlled by the pattern selection control signal selected by the first multiplexer to select a pattern from the pattern data output from the pattern generator.
申请公布号 US5889786(A) 申请公布日期 1999.03.30
申请号 US19970942727 申请日期 1997.10.02
申请人 ADVANTEST CORPORATION 发明人 SHIMOGAMA, KAZUSHIGE
分类号 G01R31/28;G01R31/3181;G01R31/319;G11C29/10;G11C29/56;(IPC1-7):G06F11/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址