| 摘要 |
An error correction decoder which includes a syndrome calculator, an error locator polynomial calculator, a standard error locator polynomial calculator, an error transform calculator and an inverse error transform calculator. These error correction decoder calculators provide a pipelined architecture for performing Reed-Solomon error correction calculations quickly. The error locator polynomial calculator includes an R-Q calculator, a lambda - mu calculator, an R-Q degree calculator and a trigger circuit. These calculators and the trigger circuit can be implemented each as a plurality of generic cells. The number of generic cells can be changed to construct Reed-Solomon circuits for different Reed-Solomon codes. The R-Q, lambda - mu and R-Q degree calculators provide adaptive circuits that use switches and multiplexors, for example, to adapt to perform appropriate calculations based upon the nature of the error correction polynomials applied to the inputs of the calculators. The R-Q, lambda - mu and R-Q degree calculators use multipliers, adders, memory elements and/or delay elements to perform the appropriate calculations. The calculations performed are controlled by selecting a path through which data will pass wherein the path is configured to perform the appropriate calculations. The R-Q degree calculator is similar. The trigger circuit provides an adaptive delay using a multiplexor, a bypass path and a delay path. The trigger circuit adjusts the timing of the trigger signal it puts out by selecting either the bypass path or the delay path. By adjusting the delay, the trigger circuit coordinates the triggering of subsequent cells with the timing of calculations performed in preceding cells.
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