| 摘要 |
PROBLEM TO BE SOLVED: To improve the hardware for execution of a fast Fourier transform by performing simultaneously two multiplication operations at the butterfly operation cores via two MAC(multiplication accumulation) units which are set in parallel to each other. SOLUTION: This processor has an MAC-A and a MAC-B, which are connected in parallel to each other. The MAC-A has data registers 12 and 14 and receives data from a memory 100 via a memory bus 80, and the MAC-B has registers 16 and 18. The input sides of registers 12 to 18 are all connected to the bus 80. The output side of the register 12 is connected to a 1st input side of a multiplication unit 22, and the output side of the register 14 is connected to a 2nd unit of the unit 22. The MAC-B has the same constitution as the MAC-A. In such a constitution where two MAC units are connected in parallel to each other, the butterfly operations can be carried out in the designated cycles of only two times for a fast Fourier transform operation. |
