| 摘要 |
A high speed digital tester module for functionally testing integrated circuits while operating at very fast speeds or under real time conditions. The high speed digital tester captures data streams from the integrated circuit at a first frequency and inputs the data into a memory device at a second frequency, which is slower than the first frequency. The digital tester module comprises a phase locked-loop, a serial-to-parallel converter and an output memory device. The phase locked-loop captures the data stream from the integrated circuit and generates two clock signals, a bit-rate clock signal and a divide-by-N-clock signal. The parallel-to-serial converter clocks in the data stream in response to the bit-rate clock signal and converts the data stream into parallel data. The output memory device clocks in the parallel data in response to the divide-by-N clock signal. The parallel data is stored in the output memory device until it is accessed by a processor which determines whether the integrated circuit is functional. |
