发明名称 INTERLEAVE CIRCUIT AND DE-INTERLEAVE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To allow a circuit to use one memory so as to effectively execute data arrangement without imposing a load on a control section. SOLUTION: A memory 100 includes a 1st buffer area and a 2nd buffer area, and for each address a data area A to which data to be rearranged are written and an address area B to which respective succeeding write destination addresses are written in advance are formed. A next address setting section 106 sets an address from an address area corresponding to an address of data in the case of writing the data sequentially to a write control section 104. The write control section 104 accesses each address sequentially according to each set address and writes data in a prescribed sequence. A read control section 108 accesses sequentially the 2nd buffer area while the write control section 104 accesses the 1st buffer area and accesses sequentially the 1st buffer area while the write control section 104 accesses the 2nd buffer area to read data in the arrangement different from the data arrangement to be received.
申请公布号 JPH1188199(A) 申请公布日期 1999.03.30
申请号 JP19970248496 申请日期 1997.09.12
申请人 OKI ELECTRIC IND CO LTD 发明人 KAWASUMI IKUO;HORIGUCHI KENJI
分类号 G11C7/00;H03M13/27;H04B1/707;H04J13/00 主分类号 G11C7/00
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