| 摘要 |
<p>PROBLEM TO BE SOLVED: To always keep delay quantity constant without depending on environment temperature and voltage value at the time of generating a clock having a prescribed delay quantity with respect to an input clock. SOLUTION: A dummy buffer circuit equivalent to a buffer circuit 2 generating unspecified delay quantity connected to the output side of an integration delay circuit 1 is connected to the front stage of the integration delay circuit 1 and a compensation pulse having pulse width equal to the delay quantity of the buffer circuit 2 is generated. Integral voltage is previously boosted by executing integration by a quantity corresponding to the delay quantity of the circuit 2 based on the compensation pulse at a previous clock period. Thus, the time until integral voltage reaches a prescribed threshold is speeded up by the delay time of the buffer circuit 2. Then, the dispersion of the total delay quantity of the integration delay circuit 1 and the buffer circuit 2 can be suppressed.</p> |
