发明名称 RECEIVER HAVING A PHASE-LOCKED LOOP
摘要 In a receiver, a phase-locked loop (PLL) is provided for synchronizing its oscillator (OSC) with a carrier (CA). A calibration circuit (CAL) calibrates the phase-locked loop's oscillator (OSC) as follows. It measures (FMC) the frequency difference (dF) between a nominal frequency (Fnom) of the carrier (CA) and a frequency (Fosc) of the phase-locked loop's oscillator (OSC). Furthermore, it adjusts (FCA) the frequency (Fosc) of the phase-locked loop's oscillator (OSC) in accordance with the measured frequency difference (dF). As a result, the phase-locked loop's oscillator (OSC) will be substantially tuned to the nominal frequency (Fnom) of the carrier (CA). The actual frequency of the carrier (CA) may differ from the nominal frequency (Fnom). In general, such a difference will be sufficiently small for the phase-locked loop (PLL) to capture the carrier (CA).
申请公布号 WO9853554(A3) 申请公布日期 1999.03.25
申请号 WO1998IB00632 申请日期 1998.04.27
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;PHILIPS AB 发明人 BREKELMANS, JOHANNES, HUBERTUS, ANTONIUS;KUEHN, HANS-JUERGEN;VROMANS, JOHANNES, SOPHIA
分类号 H03J7/02;H03J7/06;H03L7/02;H03L7/099;H03L7/113 主分类号 H03J7/02
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