| 摘要 |
<p>A semiconductor structure including a silicon wafer having silicon regions, and at least one GexSi1-x region integrated within the silicon regions. The silicon and GexSi1-x regions can be substantially co-planar surfaces. The structure can include at least one electronic device configured in the silicon regions, and at least one electronic device of III-V materials configured in said at least one GexSi1-x region. The structure can be, for example, an integrated III-V/Si semiconductor microchip. In accordance with another embodiment of the invention there is provided a method of fabricating a semiconductor structure, including providing a silicon wafer with a surface; forming a pattern of vias within the surface of the wafer; and depositing regions of GexSi1-x within the vias. The method can include the step of processing the wafer so that the wafer and GexSi1-x regions have substantially co-planar surfaces. Another embodiment provides a method of fabricating a semiconductor structure, including providing a silicon wafer with a surface; depositing regions of GexSi1-x to the surface of the silicon wafer; and depositing silicon to the surface such that the deposited GexSi1-x regions are integrated within silicon.</p> |
