| 摘要 |
A bandpass .SIGMA..DELTA. ADC utilises either a single-loop (10) or a MASH architecture (12, 100, 121). Resonators are implemented as either a delay cell resonator (131), a lossless discrete integrator resonator (132), a ForwardEuler resonator (133), or a two-path interleaved resonator (134). The resonator can be synthesized with analog circuit techniques such as active-RC, gm-C, MOSFET-C, switched capacitor, or switched current. The switched capacitor or switched current circuits can be designed using single-sampling, double-sampling, or multi-sampling circuits. The non-stringent requirement of a .SIGMA..DELTA. ADC using switched capacitor circuits allows the ADC to be implemented in a CMOS process to minimize cost and reduce power consumption. Double-sampling circuits (101) provide improved matching and improved tolerance to sampling clock jitter. In particular, a bandpass MASH 4-4 .SIGMA..DELTA. ADC provides a simulated signal-to-noise ratio of 85dB at an oversampling ratio of 32 for a CDMA application. The bandpass .SIGMA..DELTA. ADC canalso be used in conjunction with undersampling to provide a frequency downconversion.
|
