发明名称
摘要 <p>PROBLEM TO BE SOLVED: To suppress the occurrence of a congestion in an ATM(asynchronous transfer mode) exchange, to increase valid throughput and to ensure the justice of throughput between VC (logic channel) using the same output line. SOLUTION: An ATM exchange system comprises a core switch part 40 having an ATM cell exchange function among high speed input/output ports, extension input buffer module parts 50 multiplexing a plurality of low speed input lines 91 to high speed input ports 71 and extension output buffer module parts 60 separating outputs from the high speed output ports 72 into a plurality of low speed output lines 93. The extension input buffer module parts 50 can execute queuing for the respective output ports and for respective service classes. The extension output buffer module parts 60 can execute queuing for the respective output lines which they store and for the respective service classes. The core switch part 40 emits a back pressure signal 101 and the extension output buffer module parts 60 emit back pressure signals 102 and 103.</p>
申请公布号 JP2874713(B2) 申请公布日期 1999.03.24
申请号 JP19960216474 申请日期 1996.08.16
申请人 NIPPON DENKI KK 发明人 SHINOHARA MASAYUKI
分类号 H04Q3/00;H04L12/28;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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