| 摘要 |
<p>The present invention prevents a charge-up during a wiring layer etching in a nonvolatile semiconductor storage apparatus having a floating gate and a control gate to which both of positive and negative voltages are applied during a memory cell operation. On a semiconductor substrate 51 of a first conductive type, a first well 52 of a second conductive type is formed to oppose to the first conductive type. In the first well 52, a second well 53 of the first conductive type is formed. On a main surface of the second well 53 is formed a composite gate 8 consisting of a first gate insulation film 4, a floating gate 5, a second gate insulation film 6, and a control gate 7 which are successively layered. On a surface of the second well 53 are formed by way of ion implantation, a source, a drain, and a charge-up preventing element diffusion layer 18 of the second conductive type. <IMAGE></p> |
