发明名称 Segmented clock distribution network and method therefor
摘要 <p>A method for providing a clock signal to clock recipients in an integrated circuit is provided herein that comprises the steps of providing the clock signal to at least two groups of clock recipients in a manner that the first group of clock recipients are clock together at a different time in which the second group of clock recipients are clocked together. A clock distributing circuit is also provided herein that includes a first and second balanced clock tree and a delay or phase-shifting element for altering the timing or phase of the clock signal in a manner that the clock recipients pertaining to the first balanced clock tree are clock together at a different time than the time that clock recipients pertaining to the second balanced clock tree are clocked together. By segmenting the clocking of different groups of clock recipients so that they are clocked at different times, problems due to ground bounce and VDD noise are reduced. &lt;IMAGE&gt;</p>
申请公布号 EP0903660(A1) 申请公布日期 1999.03.24
申请号 EP19980306762 申请日期 1998.08.24
申请人 LSI LOGIC CORPORATION 发明人 GRAEF, STEFAN
分类号 H03K5/13;G06F1/10;H03K5/15;(IPC1-7):G06F1/10 主分类号 H03K5/13
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