发明名称 Vertex based geometry engine system for use in integrated circuit design
摘要 A system and method for processing geometry is provided which reduces the amount of memory needed for processing the geometry while improving the processing speed. The system and method deliver vertices in sequence to a vertex queue so that data in the vertex queue is freed as it is delivered and only minimal intermediate results are stored. By this incremental evaluation, less memory space is needed because input data is freed as it is used to compute results so that only small portions of intermediate results exist at any time. In another aspect of the present system and method, the vertices are maintained in the proper sequence so that sorting operations can be eliminated. More particularly, a sorted vertex queue and an unsorted vertex list are utilized so that resorting of the entire vertex list may be prevented. The use of sorted vertex queue and unsorted vertex lists are particularly useful when reading or collecting input data by allowing data to be efficiently stored and managed. In addition, a compressed format for storing geometry is utilized based on the fact that much information can be rederived from a sorted and reduced vertex queue.
申请公布号 US5887155(A) 申请公布日期 1999.03.23
申请号 US19960687043 申请日期 1996.07.25
申请人 MICROUNITY SYSTEMS ENGINEERING, INC. 发明人 LAIDIG, THOMAS
分类号 G06T11/00;G06F17/50;(IPC1-7):G06F17/50 主分类号 G06T11/00
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