发明名称 |
Issuing instructions in a processor supporting out-of-order execution |
摘要 |
The invention relates to a method for issuing instructions in a processor. In one version of the invention, the method includes the steps of dispatching the instruction and source information to a queue, determining validity of the source information, and issuing the instruction for execution in response to the source information validity. |
申请公布号 |
US5887161(A) |
申请公布日期 |
1999.03.23 |
申请号 |
US19970829662 |
申请日期 |
1997.03.31 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHEONG, HOICHI;LE, HUNG QUI;MUHICH, JOHN STEPHEN;WHITE, STEVEN WAYNE |
分类号 |
G06F9/38;G06F9/46;(IPC1-7):G06F9/46 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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