发明名称 Analog multiplier operable on a low supply voltage
摘要 A multiplier includes first through fourth transistors (Q1, Q2, Q3, Q4) and a current source (I0) The first transistor has a base electrode connected to a first input terminal (T1) and a collector electrode connected to a first output terminal (T5). The second transistor has a base electrode connected to a second input terminal (T2) and a collector electrode connected to a second output terminal (T6). The third transistor has a base electrode connected to a third input terminal (T3) and a collector electrode connected to the second output terminal. The fourth transistor has a base electrode connected to a fourth input terminal (T4) and a collector electrode connected to the first output terminal. Supplied with voltages of V1 and V2, a voltage supplying circuit produces and supplies voltages of (+E,fra 1/2+EE )V1, (-+E,fra 1/2+EE )V1, {(+E,fra 1/2+EE )V1-V2}, and {(-+E,fra 1/2+EE )V1-V2} to the input terminals. The output terminals are supplied with first and second output currents.
申请公布号 US5886560(A) 申请公布日期 1999.03.23
申请号 US19970917689 申请日期 1997.08.26
申请人 NEC CORPORATION 发明人 KIMURA, KATSUJI
分类号 G06G7/163;G06G7/164;(IPC1-7):G06G7/16;H03K5/22 主分类号 G06G7/163
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