发明名称 STC ERROR DETECT CIRCUIT FOR MPEG SYSTEM DECODER
摘要 <p>An error detecting circuit of a system time clock is described, which includes a counter section for counting the pulses of the system time clock and resetting the count value at every given period, an error generating section for generating an error value, a loop filter for outputting a voltage value in accordance with the error value, and a voltage controlled oscillator for providing a clock signal corresponding to the voltage value from the loop filter. The frequency of a system time clock of a decoder is modified in accordance with the difference of the system time clock of the decoder from that of an encoder, thereby synchronizing the system time clocks of the decoder and the encoder.</p>
申请公布号 KR0175395(B1) 申请公布日期 1999.03.20
申请号 KR19950036804 申请日期 1995.10.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 MOON, BYUNG-JUN
分类号 H04N19/102;H03L7/181;H04N7/24;H04N7/62;H04N19/00;H04N19/134;H04N19/196;H04N19/70;H04N19/82;(IPC1-7):H04N7/24 主分类号 H04N19/102
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