| 摘要 |
<p>The present invention is related to a non-volatile memory cell, comprising a semiconductor substrate (31 or 51) including a source region (32 or 52) and a drain region (33 or 53) with a channel region (34 or 54) therebetween; a floating gate (35 or 55) of a conductive material at least partially extending over a first portion of said channel region (34 or 54); a control gate (36 or 56) of a conductive material and at least partially extending over a second portion of the channel region (34 or 54); an additional program gate (37 or 57) of a conductive material and at least partially overlapping said floating gate (35 or 55) and being capacitively coupled through a dielectric layer (311 or 511) to said floating gate (35 or 55).</p> |
