发明名称 |
Circuit with hot-electron protection and method |
摘要 |
<p>An I/O circuit (100) whose output receives a voltage VPAD which is temporarily higher than a critical voltage VDS MAX > VDS 1 across drain and source of a conducting first N-FET (110, N1) acting as a pull-down device. The first N-FET is protected against hot-electron induced degradation by a serially coupled second N-FET (113, N3). A variable drain-source voltage VDS 3 is added to VDS 1. A comparator (150) compares the received voltage VPAD to a supply voltage VCC and pulls a gate (G) of the second N-FET (N3) to VPAD or to VCC. The conductivity of the second N-FET (N3) is thereby changed so that VPAD is distributed among VDS 1 and VDS 2. The comparator (150) conveniently comprises two P-FETs (P1, P2, 160, 170). <IMAGE></p> |
申请公布号 |
EP0902517(A2) |
申请公布日期 |
1999.03.17 |
申请号 |
EP19980110303 |
申请日期 |
1998.06.05 |
申请人 |
MOTOROLA, INC. |
发明人 |
YOSEFIN, MARK;AFEK, YACHIN;SHOR, JOSEPH |
分类号 |
H03K19/003;H03F1/52;H03K17/082;H03K17/10;H03K19/0175;(IPC1-7):H02H9/04;H01L27/02 |
主分类号 |
H03K19/003 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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