| 摘要 |
A system and method are described which provide for fast sequential access of stored data, as required, for example, in the performance of multiply/accumulate operations in neural network calculations and other sequential computations. The system includes a video dynamic random access memory (VRAM) with a shift register, a digital signal processor (DSP), and a data/address/control bus for coupling the DSP and VRAM. The VRAM has a parallel access port and a serial access port, and the DSP has a first input-output (I/O) port and a second I/O port. The second I/O port of the DSP is coupled, via the bus, to the parallel- and serial-access ports of the VRAM. In response to data applied via the first I/O port, the DSP transfers the applied data, via the second I/O port, the data bus, and the parallel (or serial) access port, to the VRAM for storage. The stored data is then accessed (by the DSP) as a serial sequence via the serial access port. The method employed by the system in providing such access includes the steps of transferring the stored data in parallel to the shift register, and outputting the data as a synchronized (clocked) serial sequence from the shift register.
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