LOGIC MIXED DRAM LSI

摘要

PROBLEM TO BE SOLVED: To obtain high reliability by reducing a peak current causing malfunction in a signal instruction multiple data stream (SIMD) type logic mixed dynamic random access memory(DRAM) LSI. SOLUTION: In order to reduce the level of a peak current in the SIMD type logic mixed DRAM LSI structure, clock skews are intentionally led into both of DRAM blocks 513 and logic blocks 412 and operation frequency bands and the numbers of inputs/outputs are regulated in both DRAM blocks (frequency is fM and the number of inputs/outputs is m) and logic blocks (frequency is fN and the number of inputs/outputs is n) so as to satisfy the relation of fM×m=fN×n. Preferably an address disordering system is introduced in order to attain high speed and low power DRAM access.