Producing a power semiconductor device with a semi-insulating polysilicon layer
摘要
Power semiconductor device production involves forming an insulation layer on the substrate between a conductive region and an insulating channel-stop region and forming a semi-insulating polysilicon (SIPOS) layer which covers the insulation layer while leaving parts of the conductive and channel-stop regions exposed. A power semiconductor device production process comprises: (a) forming a collector region in a semiconductor substrate and covering this region with a first insulating film; (b) forming a base region in the collector region and covering the entire substrate with a second insulating film; (c) exposing a substrate portion in which emitter and channel-stop regions are to be formed and then implanting impurities for forming an emitter region within the base region; (d) covering the entire substrate with a third insulating film and simultaneously forming the emitter region by impurity diffusion; (e) leaving at least one of the three insulating films merely in a field region between the base and channel-stop regions; (f) forming a SIPOS film over the entire structure surface and then exposing parts of the base, emitter and channel-stop regions; and (g) producing base and emitter electrodes and a metallic equipotential ring for respectively contacting the base, emitter and channel-stop regions. An Independent claim is also included for a power semiconductor device production process in which: (1) a cathode region is formed in a semiconductor substrate and a first insulating film is formed on this region; (2) an anode region is formed within the cathode region and a second insulating film is applied over the entire substrate; (3) both insulating films are etched to expose a substrate portion in which a channel-stop region is to be formed and then channel-stop region impurities are implanted in the cathode region; (4) a third insulating film is formed over the entire substrate and simultaneously the channel-stop region is produced by impurity diffusion; (5) at least one of the three insulating films is left merely in a field region between the anode and channel-stop regions; (6) a SIPOS film is formed over the entire structure surface and then parts of the anode and channel-stop regions are exposed; and (7) cathode and anode electrodes and a metallic equipotential ring are formed for respectively contacting the cathode, anode and channel-stop regions.
申请公布号
DE19836284(A1)
申请公布日期
1999.03.11
申请号
DE19981036284
申请日期
1998.08.11
申请人
SAMSUNG ELECTRONICS CO. LTD., SUWON, KYUNGKI, KR
发明人
PARK, CHAN-HO, INCHEON, KR;PARK, JAE-HONG, KYUNGKI, KR