A plurality of different power source potentials are optionally selected in a semiconductor integrated circuit. First and second semiconductor segments (3) and (4) are both in the form of a number of rows which are separated from each other by spacings (14). Power source wires (6) and (7) for supplying potentials (V1) and (V2) are disposed above the second semiconductor regions (4). Cells are formed in different wells, and therefore, it is possible that different cells receive different power source potentials. Contacts (61) or (71) are made to the second semiconductor segments (4) so that the second semiconductor segments (4) are connected to the power source wire (6) or (7). Selection of and connection to one of the wires are attained in a slicing process.
