Power semiconductor device has a semi-insulating polysilicon layer

摘要

A power semiconductor device has an insulation layer, which is formed on the substrate between a conductive region and an insulating channel-stop region, and a semi-insulating polysilicon (SIPOS) layer which covers the insulation layer while leaving parts of the conductive and channel-stop regions exposed. A power semiconductor device has a base region formed within a collector region in a semiconductor substrate, an emitter region formed within the base region, a channel-stop region isolated by a preset distance from the base region, an insulation layer formed on the substrate between the base region and the channel-stop region, a SIPOS layer covering the insulation layer while leaving parts of the base, emitter and channel-stop regions exposed, and base, emitter and equipotential electrodes respectively contacting the base, emitter and channel-stop regions. An Independent claim is also included for a power semiconductor device which has an anode region formed within a cathode region in a semiconductor substrate, a channel-stop region isolated by a preset distance from the anode region, an insulation layer formed on the substrate between the anode region and the channel-stop region, a SIPOS layer covering the insulation layer while leaving parts of the anode and channel-stop regions exposed, and anode and equipotential electrodes respectively contacting the anode and channel-stop regions.