发明名称 |
Integrated circuit packaging method, packaging apparatus, and package |
摘要 |
An integrated circuit package is formed by placing conductive traces on a substrate and forming holes through the substrate with at least one of the holes at least partially bordered by a conductive trace. The substrate is placed over a die having die pads such that at least one hole in the substrate is aligned with a die pad. A conductive piece is inserted through a hole in the substrate to make a mechanical and electrical connection between the die pad and the conductive trace proximate the hole in the substrate. <IMAGE> |
申请公布号 |
EP0901164(A2) |
申请公布日期 |
1999.03.10 |
申请号 |
EP19980460035 |
申请日期 |
1998.09.04 |
申请人 |
LSI LOGIC CORPORATION |
发明人 |
CHIA, CHOK JOO;LOW, QWAI HOONG;RANGANATHAN, RAMASWAMY |
分类号 |
H01L23/12;H01L21/60;H01L23/13;H01L23/485;H01L23/498 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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