| 摘要 |
Sequences of data pulses are supplied parallel to data electrodes in response to data to be written into pixels, selection pulse sequence is generated on cyclic basis for each selection electrode. Selection electrodes are addressed one at a time as sub-sets under control window. Each sub-set represents number (P) of selection electrodes greater than or equal to 2, so that all of P in given addressed sub-set are addressed simultaneously under associated control window via parallel application of P different selection pulse sequences. The selection pulse sequence comprises a selection pulse, an erasure pulse and a writing pulse. The selection pulses are located inside a control window for addressing the selection electrodes, with data pulses being applied to each data electrode under this window, resulting in each pixel associated with the selection electrode and a data electrode generating a control pulse in response to a voltage difference applied across the pixels under the control window. The erasure pulse is located in front of the control window and is used to drive all the pixels in the selection electrode in a direction towards a given first optical state in front of the control window. The writing pulse is at least partly located outside the control window, with the control pulse applied over a given pixel determining to what extent the already driven pixel will be shifted to a second optical state. An Independent claim is also included for the use of a decoupling control pulse for carrying out a time-multiplexed, rapid multi-line addressing of an FLCD, using this control method. |
