发明名称 Apparatus for picture decoding having frame memories commonly connected to one data bus and one address bus
摘要 An apparatus for picture decoding includes a decoder unit for obtaining decoded picture data by decoding coded data of a video signal coded by at least one of intra-frame coding (I frame), inter-frame coding (P frame), and frame-interpolation coding (B frame); a memory unit including a first frame memory, a second frame memory, and a third frame memory commonly connected to one data bus and one address bus; a display unit for reading the decoded picture data stored in the memory unit in field units based on a display synchronization signal and obtaining interlace-scanned display picture data; and a time control unit for reading the decoded picture data from the first frame memory and the second frame memory as reference frames for the B frame, and for controlling a time difference between a time of writing decoded picture data in the third frame memory, and a time of reading decoded picture data for display by the display unit, from the third frame memory, for reading decoded picture data before rewriting the same addresses, thereby attaining simultaneous read and write of the third frame memory at frame units.
申请公布号 US5880786(A) 申请公布日期 1999.03.09
申请号 US19950490237 申请日期 1995.06.14
申请人 HITACHI, LTD. 发明人 OKU, MASUO;TSUBOI, YUKITOSHI;FUJII, YUKIO;MIZOSOE, HIROYUKI
分类号 G06T9/00;H04N7/26;H04N7/50;(IPC1-7):H04N7/32 主分类号 G06T9/00
代理机构 代理人
主权项
地址