| 摘要 |
PROBLEM TO BE SOLVED: To reduce the diffused layer of a semiconductor substrate in resistance employing a polysilicon plug, and to improve the semiconductor substrate in the level of integration. SOLUTION: A first and a second insulating film, 9 and 10, are formed on a semiconductor substrate 1 along gate electrodes 5 in a cell region and a logic region, and a plug 12 is provided to the insulating films 9 and 10 in the cell region. The second insulating film 10 is removed for making the plug 12 and the first insulating film 9 exposed, a spacer sidewall 13 is formed on the sidewall of the gate electrode 5 in the logic region by the use of the first insulating film 9, and the surface of the semiconductor substrate 1 is exposed. A first interlayered insulating film 15 with a certain etching selection ratio to the first insulating film 9 is formed on the semiconductor substrate 1, the surface of the interlayered insulating film 15 is flattened, the upside of the plug 12 is exposed, furthermore a second interlayered insulating film 16 is formed thereon, a groove 19 is formed so as to reach the plug 12, a contact hole or a groove 17 is formed in the logic region so as to reach the substrate 1, and these grooves are filled up with a metal material. |
