发明名称 System for testing a transmission link
摘要 A system for testing a data transmission link between first and second terminal devices such as modems. The first terminal device transmits a test data sequence which it is received at an output access (20) of the second terminal device. That device also has an input access (21), first and second clocks which set the timing of data at the input and output accesses, and a loop-back circuit for connecting the output access to the input access to retransmit a received test sequence back to the first terminal device. Since different modems often operate at different data rates, the input and output clock rates may differ. However, during loop-back operation the clocks must be synchronized in order to avoid loss of data. Accordingly, the second terminal device includes a microprocessor for bringing the first and second clocks into synchronism to enable loop-back operation, and a memory which stores the portion of a test sequence which is received from the first terminal device while the clocks are still being synchronized.
申请公布号 US5881066(A) 申请公布日期 1999.03.09
申请号 US19960607958 申请日期 1996.02.29
申请人 LEPITRE, DIDIER 发明人 LEPITRE, DIDIER
分类号 H04L29/14;H04L1/24;H04L7/00;H04M11/00;(IPC1-7):G01R31/28;G11B27/00 主分类号 H04L29/14
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