| 摘要 |
PROBLEM TO BE SOLVED: To generate an internal clock signal in phase with an external clock signal in a short cycle over a wide range of frequencies and power supply voltages. SOLUTION: This semiconductor integrated circuit is composed of a control circuit 110, a delay circuit row 120, and a clock signal generation circuit 130, and in a delay circuit 1090 composing the delay circuit row 120, when a 1st node Ak-1 becomes a high potential, a 2nd node Bk-1 is discharged, in order, a 3rd node Ak is charged, and a 4th node Bk is discharged, in a 1st period in which a 1st control signal 101 is at a high potential. Moreover, in a 2nd period in which the 1st control signal is at a low potential, when the 4th node becomes a high potential, the 3rd node Ak is discharged, in order, the 2nd node Bk1 is charged, and the 1st node Ak-1 is discharged, and the 3rd and 4th nodes are connected with a 1st and a 2nd nodes of respective adjacent delay circuits. |
