发明名称 |
Digital write-and-read method and signal processing apparatus |
摘要 |
A digital write-and-read method and a signal processing apparatus wherein a write encoder includes a bit distribution circuit for dividing an input data block into n (n: 2 or more) series of bit strings and outputting them in parallel, a first coding circuit for executing predetermined coding for each of data series so distributed and a second coding circuit for converting the output bit series D1 to D3 of the first coding circuit to an n-bit channel code by looking up the previous channel code information, and wherein the second coding circuit executes coding by using a combination having a large Euclidean distance in a partial response equalization output taking inter-symbol interference of at least three bits into consideration as a pair.
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申请公布号 |
US5881071(A) |
申请公布日期 |
1999.03.09 |
申请号 |
US19970812286 |
申请日期 |
1997.03.06 |
申请人 |
HITACHI, LTD. |
发明人 |
KUZNETSOV, ALEXANDER;UMEMOTO, MASUO;KOBAYASHI, NAOYA;SAWAGUCHI, HIDEKI |
分类号 |
G11B5/09;G11B20/10;G11B20/14;G11B20/18;H03M13/25;(IPC1-7):G06F11/00 |
主分类号 |
G11B5/09 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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