| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent the malfunction of a device by setting the same output logic for both setting and resetting sampling circuits when an oscillation circuit stops its oscillation. SOLUTION: The reset signals are supplied to the chattering avoiding circuits 6 to 8, a real function circuit block 15 and a latch circuit 12. The output of an OR gate 9 is kept at a high level until the inverse output of a flip-flop is inverted to a high level even though the switches 2 to 4 are turned off. An oscillation circuit 10 continues its oscillation, and each inverse output of the flip-flop is inverted to a high level with the output of an inverter switched to a low level respectively when three clocks are supplied to the circuits 6 to 8. Thus, the circuit 10 stops its oscillation and the circuits 6 to 8 and the block 15 are set in the sleep states. When a switch 2 or 3 is burned on, the output of the flip-flop is switched to a low level and the rise of this output is detected.</p> |
