发明名称 Method of making multilevel interconnections of electronic parts
摘要 A process for forming a multilevel electronic interconnect structure, the electronic interconnect structure having level conductive paths parallel to a substrate and interlevel electrical interconnections perpendicular to the substrate, the process comprising providing a main aluminum layer over the substrate surface, defining level conductive paths by forming a blocking mask on the main aluminum layer, the blocking mask leaving exposed areas corresponding to the level conductive paths, carrying out a barrier anodization process on the main aluminum layer to form a surface barrier oxide over the level conductive paths, removing the blocking mask, providing an upper aluminum layer over the main aluminum layer, defining interlevel interconnections by forming a blocking mask on the upper aluminum layer, the blocking mask covering areas corresponding to the interlevel interconnections, and subjecting the main and upper aluminum layers to porous anodization. The barrier oxide defining the level conductive paths provides reliable masking of the level conductive paths during porous anodization. The porous aluminum oxide provides intralevel insulation between level conductive paths, and the combination of the barrier oxide and porous oxide provide reliable interlevel insulation between level conductive paths.
申请公布号 US5880021(A) 申请公布日期 1999.03.09
申请号 US19960719490 申请日期 1996.09.25
申请人 EAST/WEST TECHNOLOGY PARTNERS, LTD. 发明人 LABUNOV, VLADIMIR A.;SOKOL, VITALY A.;PARKUN, VLADIMIR M.;VOROB'YOVA, ALLA I.
分类号 H01L21/316;H01L21/48;H01L21/768;H01L23/24;H01L23/31;H01L23/532;(IPC1-7):H01L21/476 主分类号 H01L21/316
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