| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device which can be manufactured at high manufacturing yield with a pad of wiring or part of wiring requiring a larger width which is not affected by dishing by a chemical mechanical polishing, when the wiring is formed by using a buried wiring technique, and a manufacturing method therefor. SOLUTION: A pad 1 of a lower layer wiring and a pad 2 of an upper layer wiring are provided in a square pad region of 100 μm square. The pads 1, 2 are constituted of groove wirings 3, 4, which are narrower than the entire sizes of the pads 1, 2. The width of the groove wirings 3, 4 is set at 0.4 μm. The groove wirings 3, 4 are made as a picture drawn in a single stroke, such that they form the shape of the pads 1, 2 as a whole in the pad regions. |
