| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the number of comparators and to suppress the increase of layout area of a semiconductor device having many interal data input/outputs (DQ) by using only one comparator for one representative DQ. SOLUTION: When N output data, Dout0 to DoutN-1, are the same, the final output signal Xout of the comparison results storing register 209 becomes logically high, then activates the signal applied with an AND operation at an AND gate 21, and outputs a one-bit register 203 output signal Rout through an input/output buffer 213 and the representative DQ pad 215. When different output data exists in the output data, Dout0 to Dout N-1, the output signal Xout becomes logically low, the AND operation signal of the AND gate 211 becomes inactive, the input/output buffer 213 is disabled and the representative pad 215 becomes a high-impedance state. Thus N output data are not compared on one occasion but compared by dividing the clock cyclically, and therefore one comparator is used for the representative DQ.</p> |
