发明名称 |
Method and apparatus for creating an output vector from an input vector |
摘要 |
A method for creating an output vector Z(n-1:0) from a first vector X(n-1:0) and a second vector Y(n-1:0). The second vector Y(n-1:0) is a complement of the first vector X(n-1:0). The method subdivides X into a lower-order subvector XL(m-1:0) and a higher-order subvector XH(n-1:m). If a first 1 exists in position k in XL, then Z(k) is set to 0 and all other bits in Z(m-1:0) are set to 1. If a first 1 does not exist in XL, then all bits in Z(m-1:0) are set to 1. The method also determines if a 1 exists in XL. If a 1 exists in XL, then Z(n-1:m) is masked.
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申请公布号 |
US5880978(A) |
申请公布日期 |
1999.03.09 |
申请号 |
US19960700008 |
申请日期 |
1996.08.20 |
申请人 |
INTEL CORPORATION |
发明人 |
PANWAR, RAMESH KUMAR;PORTILLO, RALPH;KRISHNAMURTHY, NAVEEN |
分类号 |
G06F7/76;(IPC1-7):G06F7/00;G06F15/00 |
主分类号 |
G06F7/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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