发明名称 Texture pattern memory circuit for providing plural texel data in response to a single access operation
摘要 This texture pattern memory circuit is composed of a multi-texture pattern memory, a writing device and a texel selector. The multi-texture pattern memory includes an adder, a subtracter, selectors, 1st to 4th address converting devices, and 1st to 4th memory modules. The texel selector selects only the necessary data from the texel data outputted from the multi-texture pattern memory.
申请公布号 US5877770(A) 申请公布日期 1999.03.02
申请号 US19960634806 申请日期 1996.04.19
申请人 SHARP KABUSHIKI KAISHA 发明人 HANAOKA, TOSHIHARU
分类号 G09G5/39;G06F12/00;G06F12/06;G06T1/60;G06T11/20;G06T15/00;(IPC1-7):G06T11/40 主分类号 G09G5/39
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