| 摘要 |
A receiver is arranged for receiving a transmitted quadrature amplitude modulated (QAM) signal representing successive symbols, and including an in-phase (I) component and a quadrature (Q) component. In such a receiver, a timing recovery system includes a source of samples representing the QAM signal produced at a fixed frequency. A first chain of processing circuitry for the I component includes a first demodulator, coupled to the sample source, for demodulating the I component of the QAM signal to baseband; and a first interpolator, coupled to the first demodulator and responsive to a control signal, for producing I component samples taken at times synchronized to the transmitted symbols. A second chain of processing circuitry for the Q component includes a second demodulator, also coupled to the sample source, for demodulating the Q component of the QAM signal to baseband; and a second interpolator, coupled to the second demodulator and responsive to a control signal, for producing Q component samples taken at times synchronized to the transmitted symbols. A phase error detector is coupled to the first and the second interpolators, and detects the phase error between the sample times of the I and Q component samples from the first and second interpolators and times of the successive transmitter symbols. A summer is coupled to the phase error detector and a source of a nominal delay signal. A numerically controlled delay circuit, is coupled to the summer, for producing the respective control signals for the first and second interpolators.
|
