发明名称 Method of fabricating DRAM cell with capacitor having multiple concave structure
摘要 This invention discloses a novel design for increasing the surface area of a stacked capacitor used in DRAM devices. The upper and lower plates of the capacitor comprises of several concave structures. The concave structures are first produces on an LS-SOG layer using focused ion beam lithography, which is then mapped to the lower plate of the capacitor. A dielectric layer is deposited, after which an upper plate is formed. The concave structures increases the plate area, thereby increasing charge storage capacity.
申请公布号 US5877053(A) 申请公布日期 1999.03.02
申请号 US19970998933 申请日期 1997.12.29
申请人 ACER SEMICONDUCTOR MANUFACTURING INC. 发明人 WU, SHYE LIN
分类号 H01L21/02;H01L21/8242;(IPC1-7):H01L21/824 主分类号 H01L21/02
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