| 摘要 |
In a device for descrambing scrambled digital data arriving at the input of the said device at the bit frequency of a clock signal CLK, the digital data are grouped, before being descrambed, into combinations of n bits at the bit frequency acid into combinations of m x n bits at a frequency equal to the bit frequency diviced by n. The combinations of x n are then descrambled and next split into m combinations of n bits at the bit frequency divided by n and the n bits of each combination are dumped at the bit frequency. The number and surface area of the circuits of the descrambling device working at the bit frequency are thus reduced. This results in a reduction in the power dissipated by the control circuits of the descrambling device. Application to conditional access systems such as smart cards or decoders containing devices for descrambling scrambled digital data. <IMAGE> |
