| 摘要 |
A dual-packed capacitor DRAM structure includes a semiconductor substrate having a surface with a trench disposed therein, the trench having a bottom and side walls. An insulating layer covers the bottom and side walls inside the trench and covers part of the semiconductor substrate surface adjacent the trench. A pair of pass transistors are disposed symmetrically on opposite sides of the trench in the semiconductor substrate. Each pass transistor includes a gate, a source region and a drain region, the respective drain regions of the pass transistors being disposed nearest the trench. A first storage electrode is disposed above the insulating layer inside the trench and electrically coupled to the drain region of a first one of the pair of pass transistors. A first dielectric layer is disposed above a surface of the first storage electrode. A common opposed electrode is disposed above the first dielectric layer and has a vertical main section extending into the trench, a horizontal main plate extending parallel to the substrate surface, and at least one extended section extending from the horizontal main plate perpendicular to the substrate surface. The first storage electrode, the first dielectric layer and a lower portion of the common opposed electrode together make up a first capacitor structure. A second dielectric layer is disposed above the common opposed electrode, and a second storage electrode is disposed above the second dielectric layer and electrically coupled to the drain region of a second one of the pair of pass transistors. The second storage electrode, the second dielectric layer and an upper portion of the common opposed electrode together make up a second capacitor structure,
|
