发明名称 |
Method of optimizing a chip pattern on a semiconductor wafer |
摘要 |
A method is disclosed for optimizing a pattern of semiconductor chips, which includes a mask being aligned via a reference point on the mask and an alignment mark on the wafer. The relative spatial position of the alignment mark is determined by a procedure for optimizing quantities which determine the fabrication costs of a semiconductor chip, while the position of the semiconductor chips relative to each other remain fixed during the optimization.
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申请公布号 |
US5874189(A) |
申请公布日期 |
1999.02.23 |
申请号 |
US19960728599 |
申请日期 |
1996.10.10 |
申请人 |
DEUTCHE ITT INDUSTRIES GMBH |
发明人 |
STROH, RUDIGER J.;KUNERT, DETLEF |
分类号 |
G03F7/20;G03F9/00;H01L21/027;(IPC1-7):G03F9/00 |
主分类号 |
G03F7/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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