发明名称 STEP-CONTROLLED FREQUENCY SYNTHESIZER
摘要 <p>The invention relates to a method of controlling a frequency synthesizer and to a frequency synthesizer having a controllable output signal frequency and comprising a direct digital synthesizer (100) whose output signal is coupled to the input of a phase-locked loop (102). To reduce the settling time of the synthesizer, the direct digital synthesizer (100) comprises means (204) for controlling the frequency of the direct digital synthesizer from a first frequency to a second frequency in accordance with predetermined frequency steps.</p>
申请公布号 WO1999008383(A1) 申请公布日期 1999.02.18
申请号 FI1998000612 申请日期 1998.08.04
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