ISOCHRONOUS BUFFERS FOR MMX-EQUIPPED MICROPROCESSORS

摘要

A computer system includes a central processing unit directly couled to a peripheral device. The peripheral device transmits and receives data from and to the central processing unit. An MMx unit within the CPU includes data buffers for storing data. Data from the multimedia device is stored in a receive buffer and subsequently retrieved by the MMx unit for processing. Data from the MMx unit is stored in a transmit buffer and subsequently retrieved by the multimedia device. The receive buffer may include a concatenator for combining data words received from the multimedia device into a multimedia data word. The transmit buffer may include a de-concatenator for dividing a multimedia data word into a plurality of data words for transmission to the multimedia device. The data buffers provide signals indicating the relative level of fullness or emptiness of the buffers. The signals are used to adjust the rate at which data is processed. In one embodiment, data is transferred to the multimedia device in a serial fashion. In this embodiment, a serial-to-parallel converter is coupled between the multimedia device in the receive buffer and a parallel-to-serial converter is coupled between the transmit buffer and the multimedia device.