发明名称 METHOD AND SYSTEM FOR OPTIMIZING THE FLOW OF ISOCHRONOUS DATA AND CLOCK RATE INFORMATION
摘要 A computer system to optimize the flow of data and clock rate information to an isochronous bus is discussed. In one embodiment, a Universal Serial Bus (USB) host is coupled directly to a data producer or data consumer. The data received from the data producer is buffered by USB host 1504 prior to transmission to a USB function. The USB host additionally monitors the data level of the buffer within the USB host. The data level of the buffer within the USB host is indicative of the relative clock rates of the data producing device and the USB host. The USB host conveys a control signal to the data producer to increase or decrease the clock rate of the device based upon the level of data within the buffer of the USB host. In a similar manner, a data consumer is directly coupled to the USB host. The USB host stores data from a USB function and outputs the data to the data consumer at a rate determined by the data consumer. In an alternative embodiment, the data producer and the USB host are coupled via a data interface bus.
申请公布号 WO9908198(A1) 申请公布日期 1999.02.18
申请号 WO1998US10183 申请日期 1998.05.18
申请人 ADVANCED MICRO DEVICES, INC. 发明人 GULICK, DALE, E.
分类号 G06F13/42;(IPC1-7):G06F13/42 主分类号 G06F13/42
代理机构 代理人
主权项
地址
您可能感兴趣的专利