发明名称 Integrated circuit with test mode for monitoring internal voltage
摘要 The circuit has at least one reference voltage generator (RFG) and an internal voltage generator (VDC) for setting a voltage level on an internal voltage supply line (IVL) depending on a comparison with the reference voltage. A driver (2) receives the reference voltage and generates a voltage at essentially the same level for transfer to a connecting surface (1) in response to a test mode signal.
申请公布号 DE19813706(A1) 申请公布日期 1999.02.18
申请号 DE1998113706 申请日期 1998.03.27
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 YAMASAKI, KYOJI, TOKIO/TOKYO, JP;ITOU, TAKASHI, TOKIO/TOKYO, JP
分类号 G01R31/28;G11C5/14;G11C11/401;G11C11/407;G11C29/50;(IPC1-7):G11C29/00;G11C11/40 主分类号 G01R31/28
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